下一代Ryzen AI 300系列筆記型電腦即將上市

它們將配備新一代處理器，重點在於突出CPU、GPU和NPU等幾個重要實體。

The next generation of Ryzen AI 300 series mobile processors is just around the corner, and they will be integrating a new generation of silicon that will feature several key units, such as the CPU, GPU, and NPU.

下一代 Ryzen AI 300 系列行動處理器即將到來，它們將整合新一代晶片，其中包括 CPU、GPU 和 NPU 等多個關鍵單元。

A new block diagram has surfaced, showing how AMD has organized everything inside. The Strix Point silicon die measures around 225 mm², which is 66% larger than the previous generation (Phoenix at 135.99 mm²).

一個新的框圖已經浮出水面，展示了 AMD 如何組織內部的一切。 Strix Point 矽晶片尺寸約為 225 mm²，比上一代（Phoenix 為 135.99 mm²）大 66%。

Strix Point Block Diagram, CPU

Strix Point 框圖，CPU

On the left side of the block diagram is the central processing unit (CPU) section, where you can see the four Zen 5 cores at the top, each featuring 1 MB of L2 cache and sharing a 16 MB L3 cache. Below that are the eight small Zen 5C cores, each with 1 MB of L2 cache and sharing an 8 MB L3 cache.

框圖左側是中央處理器 (CPU) 部分，您可以在頂部看到四個 Zen 5 核心，每個核心具有 1 MB 的二級緩存，並共享 16 MB 的三級快取。下面是八個小型 Zen 5C 核心，每個核心都有 1 MB 二級緩存，並共享 8 MB 三級快取。

The various modules within each core are also visible, such as the branch predictor, instruction prefetcher, integer execution, floating-point units, caches, etc.

每個核心內的各種模組也是可見的，例如分支預測器、指令預取器、整數執行、浮點單元、快取等。

Over on the right is the graphics processing unit (GPU) section, where we can see eight work group processors (WGPs) of the RDNA 3.5 architecture, each featuring two compute units (CUs) for a total of 16 CUs or 1024 stream processors, along with 512 KB of L1 cache, 2 MB of L2 cache, primitive and raster units, and four render backends (RB+) and a media engine (on the right) that’s complimented by a display engine at the top.

右邊是圖形處理單元(GPU) 部分，我們可以看到RDNA 3.5 架構的8 個工作組處理器(WGP)，每個工作組處理器(WGP) 有兩個計算單元(CU)，總共16 個CU 或1024 個串流處理器，以及512 KB 的L1 快取、2 MB 的L2 快取、基元和光柵單元以及四個渲染後端(RB+) 和一個媒體引擎（右側），並由頂部的顯示引擎補充。

Finally, in the upper right corner is the neural processing unit (NPU) section, which includes the AI central module in an 8×4 layout, eight memory modules, and the NPU logical control unit and cache, which take up a significant amount of space.

最後，右上角是神經處理單元（NPU）部分，包括8×4佈局的AI中央模組、8個記憶體模組以及NPU邏輯控制單元和緩存，佔用大量記憶體空間。

Around the edges of the die are the DDR5-5600/LPDDR5X-7500 memory controllers and PHYs, along with display PHYs, USB 4/3/2, PCIe 4.0 x4, and more.

晶片邊緣周圍是 DDR5-5600/LPDDR5X-7500 記憶體控制器和 PHY，以及顯示 PHY、USB 4/3/2、PCIe 4.0 x4 等。