下一代Ryzen AI 300系列笔记本电脑即将上市

它们将配备新一代处理器，重点突出CPU、GPU和NPU等几个重要实体。

The next generation of Ryzen AI 300 series mobile processors is just around the corner, and they will be integrating a new generation of silicon that will feature several key units, such as the CPU, GPU, and NPU.

下一代 Ryzen AI 300 系列移动处理器即将到来，它们将集成新一代芯片，其中包括 CPU、GPU 和 NPU 等多个关键单元。

A new block diagram has surfaced, showing how AMD has organized everything inside. The Strix Point silicon die measures around 225 mm², which is 66% larger than the previous generation (Phoenix at 135.99 mm²).

一个新的框图已经浮出水面，展示了 AMD 如何组织内部的一切。 Strix Point 硅芯片尺寸约为 225 mm²，比上一代（Phoenix 的尺寸为 135.99 mm²）大 66%。

Strix Point Block Diagram, CPU

Strix Point 框图，CPU

On the left side of the block diagram is the central processing unit (CPU) section, where you can see the four Zen 5 cores at the top, each featuring 1 MB of L2 cache and sharing a 16 MB L3 cache. Below that are the eight small Zen 5C cores, each with 1 MB of L2 cache and sharing an 8 MB L3 cache.

框图左侧是中央处理器 (CPU) 部分，您可以在顶部看到四个 Zen 5 核心，每个核心具有 1 MB 的二级缓存，并共享 16 MB 的三级缓存。下面是八个小型 Zen 5C 核心，每个核心都有 1 MB 二级缓存，并共享 8 MB 三级缓存。

The various modules within each core are also visible, such as the branch predictor, instruction prefetcher, integer execution, floating-point units, caches, etc.

每个核心内的各种模块也是可见的，例如分支预测器、指令预取器、整数执行、浮点单元、缓存等。

Over on the right is the graphics processing unit (GPU) section, where we can see eight work group processors (WGPs) of the RDNA 3.5 architecture, each featuring two compute units (CUs) for a total of 16 CUs or 1024 stream processors, along with 512 KB of L1 cache, 2 MB of L2 cache, primitive and raster units, and four render backends (RB+) and a media engine (on the right) that’s complimented by a display engine at the top.

右侧是图形处理单元 (GPU) 部分，我们可以看到 RDNA 3.5 架构的 8 个工作组处理器 (WGP)，每个工作组处理器 (WGP) 具有两个计算单元 (CU)，总共 16 个 CU 或 1024 个流处理器，以及 512 KB 的 L1 缓存、2 MB 的 L2 缓存、基元和光栅单元以及四个渲染后端 (RB+) 和一个媒体引擎（右侧），并由顶部的显示引擎补充。

Finally, in the upper right corner is the neural processing unit (NPU) section, which includes the AI central module in an 8×4 layout, eight memory modules, and the NPU logical control unit and cache, which take up a significant amount of space.

最后，右上角是神经处理单元（NPU）部分，包括8×4布局的AI中央模块、8个内存模块以及NPU逻辑控制单元和缓存，占用大量内存空间。

Around the edges of the die are the DDR5-5600/LPDDR5X-7500 memory controllers and PHYs, along with display PHYs, USB 4/3/2, PCIe 4.0 x4, and more.

芯片边缘周围是 DDR5-5600/LPDDR5X-7500 内存控制器和 PHY，以及显示 PHY、USB 4/3/2、PCIe 4.0 x4 等。